Silicon integrated circuits (ICs) suffer from substrate coupling because the substrates are not good insulators. Coupling electric signals between circuits through the semiconductor substrate can cause noise interference and affect the normal function of the circuits. Thus, reducing unwanted substrate noise is important to ensure the normal function and performance of ICs with silicon substrates in both bulk and Fin Field Effect Transistor (FinFET) technologies.
Various techniques have been employed in ICs to reduce substrate coupling. One technique is to add high-resistance paths in the substrate. Another technique is to add guard rings around sensitive circuits. For bulk complementary metal oxide semiconductor (CMOS) technologies, the guard rings are continuous, which forms good isolation between circuits. For FinFET technologies, however, the guard rings are no longer continuous in the vertical direction and the oxide definition (OD) width is limited by the maximum Fin numbers in each FinFET technology. In this case, substrate noise can leak through the gaps in the guard rings and cause unwanted noise and interference. The inventors have found the substrate noise to be 30 dB higher in cases of a discontinuous guard ring. As technology advances, the substrate coupling becomes more severe, since the distance between circuits becomes smaller.